By Nicholas J. Daras, Michael Th. Rassias (eds.)
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Additional resources for Computation, Cryptography, and Network Security
The padding pattern should not be a repetitive pattern. Given a total state size which is larger than sum of the key and IV lengths, specifying a means for loading contents into all stages in the state is likely to involve padding. The padding pattern should not be a series of identical values (either all-zeros or all-ones), or consist of repeated copies of a specific pattern (such as 010101 or 001001), as slid pairs for small phase shifts are readily found in such cases. Avoiding repetitive patterns will defer the occurrence of slid pairs to the maximum possible shift, increase the complexity of finding slid pairs and reduce the probability of obtaining phase shifted keystreams for small shift values.
Thus, we see that this type of weak key-IV pair occurs very frequently in practice. 2 Two Registers All Zeros We now focus on the situation in which two registers contain all-zero values after performing the loading phase; we denote the cases in which the pair of all-zero register is (A; B), (A; C) or (B; C) as Cases 4, 5 and 6, respectively. As the clocking stage in each of these two registers will contain a zero, the majority value will be zero and hence these two registers will be clocked every time.
1 Loading Phase In the loading phase, the secret key and IV are loaded into the internal state of the keystream generator. The key and IV loading may be performed sequentially or simultaneously. For example, the A5/1 stream cipher  loads the secret key first followed by the IV, whereas the Grain  and Trivium  ciphers load both secret key and IV simultaneously into the internal state. In some cases, such as the common scrambling algorithm stream cipher (CSA-SC) , the IV is loaded during the diffusion phase but that approach is not common.
Computation, Cryptography, and Network Security by Nicholas J. Daras, Michael Th. Rassias (eds.)